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SAIL-RISC-V golden model is currently being actively developed and focuses on the ISS export feature whereby a reference interpreter/emulator is automatically generated from the specification. Prior work on RGEN has shown that export the LLVM (as well as QEMU and PyTorch) is possible, to support automatic flow of custom instruction extensions (modules) to compiler intrinsics, emulators and AI frameworks. In this project, the export feature shall be extended to cover CGEN, the compiler ISA definition/extension framework for GCC. Building on initial work done at Embecosm earlier, we will upgrade the CGEN framework, build transformations to automatically generate CGEN descriptions given a SAIL specification using an example of tensor/matrix multiply extension.
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SAIL-RISC-V golden model is currently being actively developed and focuses on the ISS export feature whereby a reference interpreter/emulator is automatically generated from the specification. Prior work on RGEN has shown that export the LLVM (as well as QEMU and PyTorch) is possible, to support automatic flow of custom instruction extensions (modules) to compiler intrinsics, emulators and AI frameworks. In this project, the export feature shall be extended to cover CGEN, the compiler ISA definition/extension framework for GCC. Building on initial work done at Embecosm earlier, we will upgrade the CGEN framework, build transformations to automatically generate CGEN descriptions given a SAIL specification using an example of tensor/matrix multiply extension.